Low power driver receiver topology with delay optimization for on-chip bus interconnects
نویسندگان
چکیده
منابع مشابه
Driver Pre - emphasis Signaling for On - Chip Global Interconnects
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ژورنال
عنوان ژورنال: International Journal of Engineering & Technology
سال: 2018
ISSN: 2227-524X
DOI: 10.14419/ijet.v7i3.29.18554